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Logic IC ИСПЫТАНИЯ СИСТЕМЫ
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*70/140 MHZ TEST RATE *144 MHZ DOUBLE SPEED TEST BY 3 EDGE EVENT MODE WITHOUT DECREASE TEST PIN *512 I/O CHANNELS *16M PATTERN MEMORY *FLEXIBLE RESOURCE PER PIN ARCHITECTURE *2 TEST HEADS PER SYSTEM
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Switching Power Supply ОВД
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*OPEN ARCHITECTURE SOFTWARE PLATFORM *SUPPORT ANY INSTRUMENT WITH GPIB/RS-232/RS-485/I2C INTERFACE *TEST COMMAND OPTIMIZER HELPS TO IMPROVE TEST SPEED *CAPABLE OF CODING FOR ANY POWER SUPPLY APPLICAT
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